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Espressif Systems /ESP32-C6 /EXTMEM /CACHE_SYNC_CTRL

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Interpret as CACHE_SYNC_CTRL

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CACHE_INVALIDATE_ENA)CACHE_INVALIDATE_ENA 0 (CACHE_CLEAN_ENA)CACHE_CLEAN_ENA 0 (CACHE_WRITEBACK_ENA)CACHE_WRITEBACK_ENA 0 (CACHE_WRITEBACK_INVALIDATE_ENA)CACHE_WRITEBACK_INVALIDATE_ENA 0 (CACHE_SYNC_DONE)CACHE_SYNC_DONE 0CACHE_SYNC_RGID

Description

Sync-class operation control register

Fields

CACHE_INVALIDATE_ENA

The bit is used to enable invalidate operation. It will be cleared by hardware after invalidate operation done. Note that this bit and the other sync-bits (clean_ena, writeback_ena, writeback_invalidate_ena) are mutually exclusive, that is, those bits can not be set to 1 at the same time.
CACHE_CLEAN_ENA

The bit is used to enable clean operation. It will be cleared by hardware after clean operation done. Note that this bit and the other sync-bits (invalidate_ena, writeback_ena, writeback_invalidate_ena) are mutually exclusive, that is, those bits can not be set to 1 at the same time.
CACHE_WRITEBACK_ENA

The bit is used to enable writeback operation. It will be cleared by hardware after writeback operation done. Note that this bit and the other sync-bits (invalidate_ena, clean_ena, writeback_invalidate_ena) are mutually exclusive, that is, those bits can not be set to 1 at the same time.
CACHE_WRITEBACK_INVALIDATE_ENA

The bit is used to enable writeback-invalidate operation. It will be cleared by hardware after writeback-invalidate operation done. Note that this bit and the other sync-bits (invalidate_ena, clean_ena, writeback_ena) are mutually exclusive, that is, those bits can not be set to 1 at the same time.
CACHE_SYNC_DONE

The bit is used to indicate whether sync operation (invalidate, clean, writeback, writeback_invalidate) is finished or not. 0: not finished. 1: finished.
CACHE_SYNC_RGID

The bit is used to set the gid of cache sync operation (invalidate, clean, writeback, writeback_invalidate)

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data